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Verification techniques for system-level design /

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This book will explain how to verify SoC logic designs using formal and semi-formal verification techniques. The critical issue to be addressed is whether the functionality of the design is the one that the designers intended. Simulation has been used for checking the correctness of SoC designs (as...

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Bibliographic Details
Main Author: Fujita, Masahiro, 1956-
Corporate Author: ScienceDirect (Online service)
Other Authors: Ghosh, Indradeep, 1970-, Prasad, Mukul
Format: eBook
Language:English
Language Notes:English.
Published: Amsterdam ; Boston : Morgan Kaufmann Publishers, ©2008.
Series:Morgan Kaufmann series in systems on silicon.
Subjects:
Systems on a chip > Testing.
Integrated circuits > Verification.
Formal methods (Computer science)
Circuits intégrés > Vérification.
Méthodes formelles (Informatique)
TECHNOLOGY & ENGINEERING > Electronics > Circuits > Integrated.
TECHNOLOGY & ENGINEERING > Electronics > Circuits > General.
Integrated circuits > Verification
Electronic books.
dissertations.
Academic theses
Academic theses.
Thèses et écrits académiques.
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Call Number: TK7895.E42 F95 2008eb
 
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TK7895.E42 F95 2008eb Available