Nano-CMOS gate dielectric engineering /

According to Moore's Law, not only does the number of transistors in an integrated circuit double every two years, but transistor size also decreases at a predictable rate. At the rate we are going, the downsizing of CMOS transistors will reach the deca-nanometer scale by 2020. Accordingly, the...

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Bibliographic Details

Main Author:	Wong, Hei (Author)
Corporate Author:	Taylor & Francis
Format:	eBook
Language:	English
Language Notes:	English.
Published:	Boca Raton : CRC Press, 2012.
Edition:	1st edition.
Subjects:	Metal oxide semiconductors, Complementary > Design and construction. Dielectrics. Gate array circuits. Nanoelectronics > Materials. Diélectriques. Circuits prédiffusés. Nanoélectronique > Matériaux. Dielectrics Gate array circuits Metal oxide semiconductors, Complementary > Design and construction Electronic books.
Online Access:	Connect to the full text of this electronic book