Design of cost-efficient interconnect processing units : Spidergon STNoC /

This book presents streamlined design solutions specifically for NoC. To solve critical network-on-chip (NoC) architecture and design problems related to structure, performance and modularity, engineers generally rely on guidance from the abundance of literature about better-understood system-level...

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Bibliographic Details
Corporate Author: Taylor & Francis
Other Authors: Coppola, Marcello
Format: eBook
Language:English
Published: Boca Raton : CRC Press, ©2009.
Series:System-on-chip design and technologies.
Subjects:
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Call Number: TK5105.546 .D47 2009eb
 
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