Design of Energy-Efficient A/D Converters with Partial Embedded Equalization for High-Speed Wireline Receiver Applications /

Bibliographic Details

Main Author:	Zhian Tabasy, Ehsan (Author)
Other Authors:	Palermo, Samuel (Thesis advisor)
Format:	Thesis eBook
Language:	English
Published:	[College Station, Texas] : [Texas A & M University], [2015]
Subjects:	Major Electrical Engineering. Analog to digital converter (ADC) Embedded equalization ADC-based receiver Decision feedback equalizer (DFE) Feed-forward equalizer (FFE) Serial link Successive approximation register (SAR) Time interleaving Wireline
Online Access:	Link to OAK Trust copy