APA (7th ed.) Citation

Umamageswaran, K., Pandey, S. L., & Wilsey, P. A. (1999). Formal Semantics and Proof Techniques for Optimizing VHDL Models. Springer US.

Chicago Style (17th ed.) Citation

Umamageswaran, Kothanda, Sheetanshu L. Pandey, and Philip A. Wilsey. Formal Semantics and Proof Techniques for Optimizing VHDL Models. Boston, MA: Springer US, 1999.

MLA (9th ed.) Citation

Umamageswaran, Kothanda, et al. Formal Semantics and Proof Techniques for Optimizing VHDL Models. Springer US, 1999.