Modeling of Electrical Overstress in Integrated Circuits /
Electrical overstress (EOS) and Electrostatic discharge (ESD) pose one of the most dominant threats to integrated circuits (ICs). These reliability concerns are becoming more serious with the downward scaling of device feature sizes. Modeling of Electrical Overstress in Integrated Circuits presents...
| Main Author: | |
|---|---|
| Corporate Author: | |
| Other Authors: | , |
| Format: | eBook |
| Language: | English |
| Published: |
Boston, MA :
Springer US,
1995.
|
| Series: | International series in engineering and computer science ;
289. |
| Subjects: | |
| Online Access: | Connect to the full text of this electronic book |
Internet
Connect to the full text of this electronic bookAvailable Online
| Call Number: |
TK7888.4 |
|
|---|---|---|
| Call Number | Status | Get It |
| TK7888.4 | Available | |