VHDL for Simulation, Synthesis and Formal Proofs of Hardware /

The emergence of VHDL as a standard for hardware description languages helped disseminate the use of such languages among IC designers. The creation of the standard however does not mean that all work has ceased. Research continues in the use of the language and on improvements of the standard. This...

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Bibliographic Details

Main Author:	Mermet, Jean
Corporate Author:	SpringerLink (Online service)
Format:	eBook
Language:	English
Published:	Boston, MA : Springer US, 1992.
Series:	Kluwer international series in engineering and computer science ; 183.
Subjects:	Engineering. Computer input-output equipment. Computer engineering. Systems engineering. Electronic books. Computers.
Online Access:	Connect to the full text of this electronic book