Computer architecture : complexity and correctness /

"Computer Architecture: Complexity and Correctness develops, at the gate level, the complete design of a pipelined RISC processor with delayed branch, forwarding, hardware interlock, precise maskable nested interrupts, caches, and a fully IEEE-compliant floating point unit. In contrast to other...

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Bibliographic Details
Main Author: Müller, Silvia M.
Corporate Author: SpringerLink (Online service)
Other Authors: Paul, Wolfgang J., 1951-
Format: eBook
Language:English
Published: Berlin : Springer, [2010]
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Call Number: QA76.9.A73 M845 2010eb
 
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