Area and energy efficient VLSI architectures for low-density parity-check decoders using an on-the-fly computation /

Bibliographic Details
Main Author:	Gunnam, Kiran Kumar
Other Authors:	Miller, Scott L. (Thesis advisor), Choi, Seong Gwan (Thesis advisor)
Format:	Thesis eBook
Language:	English
Published:	[College Station, Tex.] : [Texas A&M University], [2010]
Subjects:	Major computer engineering. Vector processing Parallel processing Turbo-decoding message passing Layered decoding Irregular LDPC Decoder architecture Low-density parity-check (LDPC) codes Array LDPC Semi-parallel architecture Offset min-sum Block LDPC
Online Access:	Link to OAK Trust copy

Link to OAK Trust copy

Available Online