Skew-tolerant circuit design /

<p> As advances in technology and circuit design boost operating frequencies of microprocessors, DSPs and other fast chips, new design challenges continue to emerge. One of the major performance limitations in today's chip designs is clock skew, the uncertainty in arrival times between a...

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Bibliographic Details

Main Author:	Harris, David Money
Format:	eBook
Language:	English
Published:	San Francisco : Morgan Kaufmann Publishers, [2001]
Subjects:	Timing circuits > Design and construction. Integrated circuits, Very large scale integration > Design and construction. Synchronization. Electronic books.
Online Access:	Connect to the full text of this electronic book Publisher description Table of contents