APA (7th ed.) Citation

Sachdev, M., & Pineda de Gyvez, J. (2007). Defect-oriented testing for nano-metric CMOS VLSI circuits (2nd ed.). Springer. https://doi.org/10.1007/0-387-46547-2

Chicago Style (17th ed.) Citation

Sachdev, Manoj, and José Pineda de Gyvez. Defect-oriented Testing for Nano-metric CMOS VLSI Circuits. 2nd ed. Dordrecht: Springer, 2007. https://doi.org/10.1007/0-387-46547-2.

MLA (9th ed.) Citation

Sachdev, Manoj, and José Pineda de Gyvez. Defect-oriented Testing for Nano-metric CMOS VLSI Circuits. 2nd ed. Springer, 2007. https://doi.org/10.1007/0-387-46547-2.