Fault modeling, delay evaluation and path selection for delay test under process variation in nano-scale VLSI circuits /

Bibliographic Details

Main Author:	Lu, Xiang, 1976-
Other Authors:	Shi, Weiping (Thesis advisor)
Format:	Thesis eBook
Language:	English
Published:	[College Station, Tex.] : [Texas A&M University], [2006]
Subjects:	Major computer engineering. timing analysis fault modeling process viriation test delay test bridge
Online Access:	Link to OAK Trust copy