Observation-based test set generation /

When circuits are manufactured, there are unavoidable defects that occur in a small but significant portion of the products. Input test patterns that can detect these defects are uniquely generated for each circuit in advance of their production. Current test set generation relies primarily on the &...

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Bibliographic Details
Main Author: Cobb, Jeffrey Lee, 1982-
Format: Thesis Book
Language:English
Published: [Place of publication not identified] : [publisher not identified] ; 2004.
Subjects:
Online Access:Link to OAK Trust copy

MARC

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099 |a 2004  |a Fellows Thesis  |a C62 
100 1 |a Cobb, Jeffrey Lee,  |d 1982- 
245 1 0 |a Observation-based test set generation /  |c by Jeffrey Lee Cobb. 
264 1 |a [Place of publication not identified] :  |b [publisher not identified] ;  |c 2004. 
300 |a vii, 20 leaves :  |b illustrations ;  |c 28 cm. 
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502 |b Fellows Thesis  |c Texas A&M University  |d 2004. 
504 |a Includes bibliographical references (leaf 19). 
500 |a Vita. 
500 |a "Major Subject: Electrical Engineering". 
520 |a When circuits are manufactured, there are unavoidable defects that occur in a small but significant portion of the products. Input test patterns that can detect these defects are uniquely generated for each circuit in advance of their production. Current test set generation relies primarily on the "stuck-at" model, which both excites and observes every site of the circuit. However, a test set with good stuck-at fault coverage will not necessarily find all the defects in a circuit. Other models, such as bridging surrogates and transition surrogates, can also be considered when evaluating the quality of a test set. My research explores the role that observation alone plays in generating a set of valuable tests. I compare the performance of test patterns generated with traditional detection methods and ones made only considering the observation of each site. I also compare the lengths of each test set, with the goal of finding shorter and more effective tests that achieve an acceptable defective part level for a circuit. 
650 4 |a Major electrical engineering. 
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