Timing analysis of digital circuits considering impact of capacitive crosstalk & process variation on path delays /

Competitive design of modern digital circuits requires high performance at reduced cost and time-to-market. Hence, accurate timing analysis is essential in the design and test of digital integrated circuits. With reduced feature sizes and increasing clock frequency the problem of timing analysis is...

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Bibliographic Details

Main Author:	Upasani, Neeraj Sudhir
Format:	Thesis eBook
Language:	English
Published:	[Place of publication not identified] : [publisher not identified] ; 2001.
Subjects:	Major electrical engineering.
Online Access:	Link to OAKTrust copy