VLSI implementation of encoder and decoder for low-density parity-check codes /

The aim of this research is to implement an encoder and a message-passing decoder for low-density parity-check codes in hardware. The desired data rate is 44.8 Mbps and the channel is an Additive White Gaussian Noise(AWGN) channel. The effect of using finite precision for the messages passed in de...

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Bibliographic Details

Main Author:	Sivakumar, Suresh
Format:	Thesis eBook
Language:	English
Published:	[Place of publication not identified] : [publisher not identified] ; 2001.
Subjects:	Major electrical engineering.
Online Access:	Link to OAKTrust copy