New algorithms for logic verification and sequential redundancy identification /
Recent advances in VLSI technology have made testing and verification of integrated circuits more and more important. In this dissertation, we propose new algorithms for combinational logic verification, automatic flip-flop matching and sequential redundancy identification. This dissertation first...
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| Format: | Thesis Book |
| Language: | English |
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[Place of publication not identified] :
[publisher not identified] ;
2000.
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| Call Number: |
2000 Dissertation C3665 |
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| Call Number | Status | Get It |
| 2000 Dissertation C3665 | Available | |
Available Online
| Call Number: |
2000 Dissertation C3665 |
|
|---|---|---|
| Call Number | Status | Get It |
| 2000 Dissertation C3665 | Available | |