Bridging faults in CMOS circuits which are non-Iddq testable and their effect on delay testing /

(rather than ratioed logic gates) are investigated.

Bibliographic Details

Main Author:	Tu, Gao, 1972-
Format:	Thesis eBook
Language:	English
Published:	[Place of publication not identified] : [publisher not identified] ; 1997.
Subjects:	Major electrical engineering.
Online Access:	Link to OAKTrust copy