APA (7th ed.) Citation

Lee, J. H. (1995). A method for finding the critical path in VLSI circuits using the bounded gate delay model. [publisher not identified].

Chicago Style (17th ed.) Citation

Lee, Jay Hyun. A Method for Finding the Critical Path in VLSI Circuits Using the Bounded Gate Delay Model. [Place of publication not identified]: [publisher not identified], 1995.

MLA (9th ed.) Citation

Lee, Jay Hyun. A Method for Finding the Critical Path in VLSI Circuits Using the Bounded Gate Delay Model. [publisher not identified], 1995.