APA (7th ed.) Citation

Karkala, A. R. (1992). A VLSI implementation of a programmable sorting mesh array with shared register communication and pipelined input and output operations. [publisher not identified].

Chicago Style (17th ed.) Citation

Karkala, Ajaykumar Reddy. A VLSI Implementation of a Programmable Sorting Mesh Array with Shared Register Communication and Pipelined Input and Output Operations. [Place of publication not identified]: [publisher not identified], 1992.

MLA (9th ed.) Citation

Karkala, Ajaykumar Reddy. A VLSI Implementation of a Programmable Sorting Mesh Array with Shared Register Communication and Pipelined Input and Output Operations. [publisher not identified], 1992.