A VLSI implementation of a programmable sorting mesh array with shared register communication and pipelined input and output operations /

Bibliographic Details

Main Author:	Karkala, Ajaykumar Reddy
Format:	Thesis eBook
Language:	English
Published:	[Place of publication not identified] : [publisher not identified] ; 1992.
Subjects:	Array processors. Computer architecture. Sorting (Electronic computers) Major electrical engineering.
Online Access:	Link to OAKTrust copy