Table of Contents:
“...10.2 Belief in Pairwise MRF System -- 10.3 BP in Discrete Space -- 10.4 BP in Vector Space -- 10.5 Flow Network for Energy Function -- 10.6 Swap Move Algorithm -- 10.7 Expansion Move Algorithm -- Problems -- References -- Part Four Verilog Design -- 11 Relaxation for Stereo Matching -- 11.1 Euler-Lagrange Equation -- 11.2 Discretization and Iteration -- 11.3 Relaxation Algorithm for Stereo Matching -- 11.4 Relaxation Machine -- 11.5 Overall System -- 11.6 IO Circuit -- 11.7 Updation Circuit -- 11.8 Circuit for the Data Term -- 11.9 Circuit for the Differential -- 11.10 Circuit for the Neighborhood -- 11.11 Functions for Saturation Arithmetic -- 11.12 Functions for Minimum Argument -- 11.13 Simulation -- Problems -- References -- 12 Dynamic
Programming for Stereo Matching -- 12.1 Search Space -- 12.2 Line Processing -- 12.3
Computational Space -- 12.4 Energy Equations -- 12.5 DP Algorithm -- 12.6 Architecture -- 12.7 Overall Scheme -- 12.8 FIFO Buffer -- 12.9
Reading and Writing -- 12.10 Initialization -- 12.11 Forward Pass -- 12.12 Backward Pass -- 12.13 Combinational Circuits -- 12.14 Simulation -- Problems -- References -- 13 Systolic Array for Stereo Matching -- 13.1 Search Space -- 13.2 Systolic Transformation -- 13.3 Fundamental Systolic Arrays -- 13.4 Search Spaces of the Fundamental Systolic Arrays -- 13.5 Systolic Algorithm -- 13.6 Common Platform of the Circuits -- 13.7 Forward Backward and Right Left Algorithm -- 13.8 FBR and FBL Overall Scheme -- 13.9 FBR and FBL FIFO Buffer -- 13.10 FBR and FBL
Reading and Writing -- 13.11 FBR and FBL
Preprocessing -- 13.12 FBR and FBL Initialization -- 13.13 FBR and FBL Forward Pass -- 13.14 FBR and FBL Backward Pass -- 13.15 FBR and FBL Simulation -- 13.16 Backward Backward and Right Left Algorithm -- 13.17 BBR and BBL Overall Scheme -- 13.18 BBR and BBL Initialization -- 13.19 BBR and BBL Forward Pass....
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