http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
Electronic design automation for IC implementation, circuit design, and process technology
1 online resource (797 pages) : illustrations
Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology, the second of two volumes in the Electronic Design Automation for Integrated Circuits Handbook, Third Edition, thoroughly examines real?time logic (RTL) to GDSII generation, analog/mixed?signal design, physical verification, and technology computer?aided design (TCAD). Chapters contributed by leading experts authoritatively discuss design for manufacturability (DFM) at the nanoscale, power supply network design and analysis, design modeling, and much more.New to This Edition: Major updates appearing in the initial phases of the design flow, where the level of abstraction keeps rising to support more functionality with lower non?recurring engineering (NRE) costs Significant revisions reflected in the final phases of the design flow, where the complexity due to smaller and smaller geometries is compounded by the slow progress of shorter wavelength lithography New coverage of cutting?edge applications and approaches realized in the decade since the publication of the second edition-these are illustrated by updates including the impact of new analog layout methods, chiplet integration, and power?optimized design, in various chapters Offering improved depth and modernity, this book provides a valuable, state?of?the?art reference for electronic design automation (EDA) students, researchers, and professionals.
Section 1. RTL to GDS-II, or Synthesis, Place, and Route. 1. Design Flows. 2. Logic Synthesis. 3. Power Analysis and Optimization from Circuit to Register Transfer Levels. 4. Equivalence Checking. 5. Digital Layout. 6. Static Timing Analysis. 7. Structured Digital Design. 8. Routing. 9. Physical Design for 3D Ics. 10. Gate Sizing. 11. Clock Design and Synthesis. 12. Exploring Challenges of Libraries for Electronic Design. 13. Design Closure. 14. Tools for Chip-Package Codesign. 15. Design Databases. 16. FPGA Synthesis and Physical Design. Section 2. Analog and Mixed-Signal Design. 17. Simulation of Analog and RF Circuits and Systems. 18. Simulation and Modeling for Analog and Mixed-Signal Integrated Circuits. 19. Layout Tools for Analog Integrated Circuits and Mixed-Signal Systems-on-Chip. Section 3. Physical Verification. 20. Design Rule Checking. 21. Resolution Enhancement Techniques and Mask Data Preparation. 22. Design for Manufacturability in the Nanometer Era. 23. Design and Analysis of Power Supply Networks. 24. Noise in Digital Ics. 25. Layout Extraction. 26. Mixed-Signal Noise Coupling in System-on-Chip Design: Modeling, Analysis, and Validation. Section 4. Technology Computer-Aided Design. 27. Process Simulation. 28. Device Modeling: From Physics to Electrical Parameter Extraction. 29. High-Accuracy Parasitic Extraction.
edited by Luciano Lavagno, Grant E. Martin, Igor L. Markov, and Louis K. Scheffer.
Includes bibliographical references and index.