New materials and devices enabling 5G applications and beyond /

This book explores the emerging materials and devices that are critical for enabling the applications of 5G technology and beyond. It addresses the technological innovations driving the wireless communication industry to higher frequencies to meet the increasing demand for data and connectivity. The...

Full description

Bibliographic Details
Corporate Author: ScienceDirect (Online service)
Format: eBook
Language:English
Published: Amsterdam : Elsevier, 2024.
Series:Materials today
Subjects:
Online Access:Connect to the full text of this electronic book
Table of Contents:
  • Front Cover
  • New Materials and Devices Enabling 5G Applications and Beyond
  • Copyright Page
  • Contents
  • List of contributors
  • 1 Introduction to 5G applications and beyond
  • 1.1 Introduction
  • 1.2 Overview front-end technologies
  • 1.3 Compound semiconductor devices
  • 1.3.1 GaN devices
  • 1.3.2 InP-based devices
  • 1.4 Heterogeneous integration
  • 1.4.1 Introduction
  • 1.4.2 Different approaches
  • 1.4.2.1 Chip-let and die-let
  • 1.4.2.2 Wafer-level bonding
  • 1.4.2.3 Interposer
  • 1.4.3 Radio frequency interposer
  • 1.5 Summary
  • References
  • 2 FD-SOI and RF-SOI technologies for 5G
  • 2.1 Introduction
  • 2.2 Introduction to silicon-on-insulator technology
  • 2.3 Partially depleted-silicon-on-insulator and fully depleted-silicon-on-insulator devices
  • 2.3.1 Technology device description
  • 2.3.2 RF figures of merit
  • 2.3.3 Extrinsic parasitics minimization
  • 2.3.4 Back gate as RF tuning knob in UTBB fully depleted-silicon-on-insulator technology
  • 2.4 Passives in silicon-on-insulator technology
  • 2.4.1 Substrate impact
  • 2.4.2 Millimeter-wave back end of line
  • 2.5 Conclusion
  • References
  • 3 Radio frequency FinFET bulk silicon technology
  • 3.1 Introduction
  • 3.2 SiGe NPN heterojunction bipolar transistor
  • 3.3 UTBSOI MOSFET
  • 3.4 Radio frequency complementary metal-oxide semiconductor technology
  • 3.5 Radio frequency FinFET
  • 3.6 Radio frequency planar MOSFET versus FinFET
  • 3.7 The radio frequency FinFET fabrication process flow
  • 3.8 FinFET device structures
  • 3.9 Radio frequency device parasitics
  • 3.10 Parasitics resistances
  • 3.10.1 Gate resistance (Rg)
  • 3.10.2 FinFET gate resistance (Rg)
  • 3.10.3 The raised source and drain parasitic resistance (Rs, Rd)
  • 3.11 FinFET parasitic capacitance
  • 3.11.1 Source to drain parasitic capacitance (Csd)
  • 3.11.2 Gate-to-substrate overlap capacitance (Cgx).
  • 3.11.3 Source and drain to substrate capacitance (Csx, Cdx)
  • 3.12 FinFET radio frequency device figures-of-merit
  • 3.13 The 3D FinFET small signal model
  • 3.14 FinFET radio frequency silicon results
  • 3.15 Analog transistors
  • 3.16 Radio frequency high-voltage (I/O) FETs
  • 3.17 Gain-power efficiency
  • 3.18 Substrate network
  • 3.19 Noise in MOS transistors
  • 3.19.1 Flicker (1/f) noise
  • 3.19.2 Thermal noise
  • 3.20 Summary
  • List of symbols
  • List of acronyms
  • References
  • 4 Gallium nitride technologies for wireless communication
  • 4.1 Introduction
  • 4.2 Why gallium nitride?
  • 4.2.1 Benefits of gallium nitride
  • 4.2.2 Different flavors of gallium nitride
  • 4.2.2.1 Introduction
  • 4.2.2.2 Nucleation layer
  • 4.2.2.3 Buffer layer
  • 4.2.2.4 Voltage blocking or confinement layer
  • 4.2.2.5 Gallium nitride channel
  • 4.2.2.6 Top barrier layer
  • 4.2.2.7 Impact of the starting substrate
  • 4.2.2.8 Different growth techniques
  • 4.2.3 Operation mode
  • 4.2.4 Ga-polar versus N-polar
  • 4.3 Applications
  • 4.4 Gallium nitride for power applications
  • 4.5 Gallium nitride for wireless communication
  • 4.5.1 Introduction
  • 4.5.2 From lab devices to CMOS-compatible transistors
  • 4.5.3 Challenges
  • 4.5.3.1 Reliability
  • 4.5.3.2 Self-heating
  • 4.5.3.3 Impact of the Si substrate on loss and linearity
  • 4.5.4 D-mode versus E-mode
  • 4.5.5 Device modeling
  • 4.5.6 Gallium nitride versus gallium arsenides
  • 4.6 Summary
  • References
  • 5 Heterojunction bipolar transistors for sub-THz applications
  • 5.1 Introduction
  • 5.2 Bipolar transistors
  • 5.2.1 Introduction
  • 5.2.2 Different types of bipolar transistors
  • 5.2.3 Operating principle
  • 5.2.4 InP heterojunction bipolar transistor versus silicon-germanium heterojunction bipolar transistor
  • 5.3 Silicon-germanium heterojunction bipolar transistor.
  • 5.3.1 Fabrication of silicon-germanium heterojunction bipolar transistor
  • 5.3.1.1 Growth of silicon-germanium layers
  • 5.3.1.2 Doping of silicon-germanium layers
  • 5.3.2 Silicon-germanium heterojunction bipolar transistor versus SiGe BICMOS
  • 5.4 InP heterojunction bipolar transistor
  • 5.4.1 Introduction
  • 5.4.2 Upscaling the InP heterojunction bipolar transistor
  • 5.4.2.1 Microtransfer printing
  • 5.4.2.2 Nanoridge engineering
  • 5.4.2.3 Strain relaxed buffers
  • 5.4.2.4 Reconstructed wafers
  • 5.4.3 Heterojunction bipolar transistor versus high electron mobility transistor
  • 5.5 Device modeling
  • 5.6 Optimizing the bipolar transistor
  • 5.6.1 Scaling the heterojunction bipolar transistor
  • 5.6.2 Reliability
  • 5.6.3 Self-heating
  • 5.7 Summary
  • References
  • 6 InP-based monolithic microwave integrated circuit technologies for 5G and beyond
  • 6.1 InP devices for millimeter-wave/terahertz wireless communications toward beyond 5G
  • 6.2 InP device technologies
  • 6.2.1 InP-heterojunction bipolar transistors
  • 6.2.2 Substrate-mode-reduction technique
  • 6.2.3 MMIC-to-WG transition
  • 6.3 InP MMICs for 300-GHz-band transceiver
  • 6.3.1 300-GHz power amplifier
  • 6.3.2 300-GHz mixer
  • 6.4 300-GHz-band InP transceiver and 120Gb/s wireless data transmission
  • 6.5 Conclusion
  • References
  • 7 RF-MEMS for 5G: high performance switches and reconfigurable passive networks
  • 7.1 A recap of RF-MEMS across two decades of research and discussion
  • 7.1.1 A brief history of MEMS technologies evolution
  • 7.1.2 The market of RF-MEMS: from initial forecasts to current perspectives
  • 7.2 5G services characteristics distilled into passive components specifications
  • 7.3 Demand and supply: where RF-MEMS and 5G can meet
  • 7.4 An example of RF-MEMS technology platform
  • 7.4.1 RF-MEMS manufacturing process
  • 7.4.2 Switching devices and solutions.
  • 7.4.3 Reconfigurable passive networks enabled by RF-MEMS switching devices
  • 7.5 Conclusions
  • References
  • 8 Antenna-in-package design considerations for millimeter-wave 5G
  • 8.1 Introduction
  • 8.2 Antenna design for mm-wave 5G handset applications
  • 8.2.1 Handset antenna design considerations and trade-offs
  • 8.2.1.1 Cellular handset environment
  • 8.2.1.2 Specific absorption rate
  • 8.2.1.3 Handset antenna form factors
  • 8.2.1.4 Choice of substrate and antenna type
  • 8.2.1.5 Omni-directional antenna design for handset applications
  • 8.2.2 An antenna design example for handset applications
  • 8.2.2.1 Integrated circuit design for switched beam operation
  • 8.3 Scalable phased arrays for base-station applications
  • 8.3.1 Scaled phased array design considerations and trade-offs
  • 8.3.1.1 Functional partitioning among integrated circuits
  • 8.3.1.2 Antenna array implementation
  • 8.3.1.3 Element-to-element matching and calibration
  • 8.3.1.4 Thermal management
  • 8.3.1.5 Electromagnetic simulation of antenna arrays
  • 8.4 Conclusions
  • References
  • 9 Circuits for 5G applications implemented in FD-SOI and RF/PD-SOI technologies
  • 9.1 Introduction
  • 9.2 Link budget analysis
  • 9.2.1 A realistic example for 5G telecommunications: campus scenario, the handset perspective
  • 9.3 Switch
  • 9.3.1 Single-pole double-throw basic design: two FETs
  • 9.3.2 Adding shunt FETs for better isolation
  • 9.3.3 Stacking FETs for higher power handling and better linearity
  • 9.3.4 Limits of the series RonCoff metric
  • 9.3.4.1 Shunt loss analysis: SLVT versus BFMOAT
  • 9.3.4.2 SLVT with BFMOAT-shunt-impedance-enhancing ring
  • 9.3.5 State of the art
  • 9.4 Low noise amplifier
  • 9.4.1 Transistor noise models
  • 9.4.2 Total noise figure and equivalent noise resistance
  • 9.4.3 NFmin dependence with transistor's cutoff frequency and geometry.
  • 9.4.4 State-of-the-art mm-wave low noise amplifiers: topology and performance review
  • 9.5 Power amplifier
  • 9.5.1 Power amplifier basics-the loadline concept
  • 9.5.2 Power added efficiency: a detailed contributors analysis
  • 9.5.3 Techniques for increased output power
  • 9.5.3.1 Transistor stacking
  • 9.5.3.2 Power combining
  • 9.5.4 State-of-the-art power amplifiers with 5G modulations, the challenge of high efficiency at high power back-off
  • 9.5.4.1 Back-gate biasing-an opportunity for radio frequency designers
  • 9.6 Conclusion
  • References
  • 10 Power amplifiers monolithic microwave integrated circuit design for 5G applications
  • 10.1 Introduction
  • 10.2 Transmitter architectures for massive multiple-input-multiple-output
  • 10.2.1 Massive multiple-input-multiple-output for sub 6GHz
  • 10.2.2 Massive multiple-input-multiple-output for mmWave
  • 10.2.3 The PA architecture and specification
  • 10.3 Design of a sub 6GHz Doherty power amplifier
  • 10.3.1 A Doherty power amplifier monolithic microwave integrated circuit with full integration
  • 10.3.2 A Doherty power amplifier monolithic microwave integrated circuit with hybrid integration
  • 10.3.3 A Doherty power amplifier monolithic microwave integrated circuit with partial integration
  • 10.4 Design of a mmWave Doherty power amplifier
  • 10.4.1 A mmWave Doherty power amplifier based on III-V semiconductors
  • 10.4.2 A mmWave Doherty power amplifier based on a Si technology
  • 10.5 Linearity improvement from circuit design
  • 10.5.1 Nonlinearity compensation
  • 10.5.2 Linearity enhancement circuits
  • 10.6 Conclusions
  • References
  • Index
  • Back Cover.