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Nanoscale Memristor Device and Circuits Design.

Bibliographic Details
Main Author: Raj, Balwinder
Corporate Author: ScienceDirect (Online service)
Other Authors: Hemani, Ahmed, Jabir, Abusaleh M., Khandelwal, Saurabh
Format: eBook
Language:English
Published: San Diego : Elsevier, 2023.
Series:Micro & nano technologies.
Subjects:
Memristors.
Nanoelectromechanical systems.
Memristances.
Nanosystèmes électromécaniques.
Electronic books.
Online Access:Connect to the full text of this electronic book
Table of Contents:
  • Intro
  • Nanoscale Memristor Device and Circuits Design
  • Copyright
  • Contents
  • Contributors
  • Preface
  • Acknowledgments
  • Chapter 1: Memristor and spintronics as key technologies for upcoming computing resources
  • 1.1. End of Moores law
  • 1.2. Life beyond Moores law: Multifunctional devices
  • 1.2.1. Features, strengths, and properties of multifunctional devices
  • 1.2.2. Components and devices
  • 1.2.2.1. Memristors
  • 1.2.2.2. Memristor-based neuromorphic computing
  • 1.2.2.3. Spintronics
  • 1.2.2.4. Spintronics-based neuromorphic computing
  • 1.3. Materials for memristors and spintronics
  • 1.3.1. Materials for memristors
  • 1.3.2. Materials for spintronics
  • 1.4. Future prospects based on memristors and spintronics
  • 1.5. Challenges
  • 1.6. Summary
  • References
  • Chapter 2: Design and investigation of various memristor models for neuromorphic applications
  • 2.1. Introduction
  • 2.2. Literature review
  • 2.2.1. Nonlinear ionic drift model (Biolek model)
  • 2.2.2. Simmons TB (tunnel barrier) model
  • 2.2.3. Neuron biological model
  • 2.2.4. Neuron classical model
  • 2.2.5. Training algorithm flow diagram of Memristive perceptron
  • 2.2.5.1. The algorithm of the training can be shown as steps, as follows:
  • 2.2.5.2. Training procedure algorithm
  • 2.2.5.3. Finalize values
  • 2.2.6. Wide range of possible future memristor applications
  • 2.2.7. Neuromorphic applications of memristors
  • 2.2.7.1. Mathematics and physics-inspired circuits
  • 2.2.7.2. Biological neuromorphic inspired course
  • 2.3. Future work
  • 2.4. Conclusion
  • References
  • Chapter 3: Memristor-based devices for hardware security applications
  • Summary
  • 3.1. Introduction
  • 3.2. An overview of hardware security
  • 3.3. Issues with counterfeited ICs
  • 3.3.1. Physical unclonable functions (PUFs): A solution for counterfeited ICs
  • 3.4. Nanoelectronic devices and their characteristics
  • 3.5. Memristors
  • 3.5.1. Theory
  • 3.5.2. Device structure
  • 3.5.3. Operation
  • 3.5.4. Derivation of memristance
  • 3.5.5. Write time
  • 3.5.6. Basic characteristics of memristors
  • 3.6. Prevention of side-channel attacks using memristors
  • 3.7. Memristor-based physical unclonable functions (MemPUFs)
  • 3.7.1. Architecture of MemPUFs
  • 3.7.2. Operation
  • 3.7.3. Security analysis
  • 3.7.4. CMOS-based PUFs
  • 3.7.5. Advantages over CMOS/CMOS equivalent PUFs
  • 3.8. Memristor-based public physical unclonable functions (MemPPUFs)
  • 3.9. Architecture of MemPPUFs
  • 3.9.1. Operation
  • 3.9.2. Security analysis
  • 3.9.3. CMOS-based PPUFs
  • 3.9.4. Advantages over CMOS-based PPUFs
  • 3.10. Memristor-based tamper detection circuits (MemTDCs)
  • 3.11. Architecture
  • 3.11.1. Operation
  • 3.11.2. Security analysis
  • 3.11.3. CMOS-based tamper detection circuits
  • 3.11.4. Advantages over CMOS-based tamper detection circuits
  • 3.12. Memristor-based random bit generators (MemRBGs)
  • 3.12.1. Architecture