Nanoelectronics : physics, materials and devices /
Approx.528 pagesApprox.528 pages.
| Corporate Author: | |
|---|---|
| Other Authors: | , , , , |
| Format: | eBook |
| Language: | English |
| Published: |
Amsterdam, Netherlands ; Oxford, United Kingdom ; Cambridge MA :
Elsevier,
[2023]
|
| Series: | Micro & nano technologies.
|
| Subjects: | |
| Online Access: | Connect to the full text of this electronic book |
Table of Contents:
- Front Cover
- Nanoelectronics: Physics, Materials, and Devices
- Copyright Page
- Contents
- List of contributors
- Preface
- 1 Basics concepts of device physics
- 1.1 Introduction
- 1.2 How electrons move
- 1.2.1 Atomic structure
- 1.3 Mobility of carriers
- 1.3.1 Scattering
- 1.4 Concentration of carriers
- 1.5 Electric field
- References
- 2 Scaling the MOSFET: detrimental short channel effects and mitigation techniques
- 2.1 Introduction
- 2.2 Carrier velocity saturation
- 2.3 Channel charge sharing
- 2.3.1 Long channel devices
- 2.3.2 Short channel devices
- 2.4 Drain-induced barrier lowering
- 2.5 Punch-through
- 2.6 Hot carrier effect/hot carrier injection
- 2.7 Velocity overshoot
- 2.8 Gate-induced drain leakage
- 2.9 Direct source to drain tunneling
- 2.10 Mitigation of short channel effects
- 2.10.1 Gate engineering
- 2.10.2 Dual-material gate
- 2.10.2.1 Structure and operation
- 2.10.2.2 Challenges
- 2.10.3 Multigate FETs
- 2.10.3.1 Structure
- 2.10.3.2 Operation
- 2.10.3.3 Challenges
- 2.10.4 Channel engineering
- 2.10.4.1 Structure
- 2.10.4.2 Operation
- 2.10.4.3 Challenges
- 2.10.5 Buried oxide engineering
- 2.10.5.1 Ground plane FDSOI MOSFET
- 2.10.5.1.1 Structure and operation
- 2.10.6 Alternate conduction mechanism
- 2.10.6.1 Tunneling
- 2.10.6.2 Impact ionization
- 2.11 Conclusion
- References
- 3 Alternate device architectures to mitigate challenges
- 3.1 Introduction
- 3.2 Silicon on insulator and silicon on nothing concepts
- 3.2.1 Silicon on insulator
- 3.2.2 Silicon on nothing
- 3.3 Nonuniform doping and pocket engineering, halo doping, and reverse short channel effects
- 3.3.1 Nonuniform doping
- 3.3.2 Halo/pocket doping profile
- 3.3.3 Reverse short channel effect
- 3.4 Gate material engineering: dual material gate, triple material gate.
- 3.5 Use of high-K dielectric to reduce gate tunneling
- 3.6 Spacer engineering and underlap
- 3.7 Summary
- References
- 4 Emerging field effect transistor architectures-part I
- 4.1 Introduction
- 4.2 Reconfigurable Schottky barrier field effect transistor
- 4.2.1 Physics of Schottky contact
- 4.2.2 Schottky barrier metal-oxide-semiconductor field-effect transistor
- 4.2.3 Operation principle of reconfigurable Schottky barrier field effect transistor
- 4.3 Spin field effect transistor
- 4.4 Tunnel field effect transistor
- 4.4.1 Methods for tunnel field effect transistors electrical performance improvement
- 4.4.1.1 Doping engineering
- 4.4.1.2 Material engineering
- 4.4.1.3 Structure and geometry engineering
- 4.4.1.3.1 Vertical tunnel field effect transistor
- 4.4.1.3.2 Electron-hole bilayer tunnel field effect transistor
- 4.5 Summary
- References
- 5 Emerging FET architectures-part II
- 5.1 Introduction
- 5.2 Evolution of multiple gate MOSFET structure
- 5.2.1 Scaling constraints
- 5.2.2 Double gate MOSFET
- 5.3 Cylindrical and linearly graded gate MOSFET
- 5.4 Concept of ultra-thin body FETs
- 5.5 Recent trends in FinFET
- 5.6 Junctionless field effect transistors
- 5.7 Tunnel FET basic principle
- 5.7.1 Triple gate tunneling field effect transistors
- 5.7.2 Linearly graded tunneling field effect transistors
- References
- 6 Novel materials-based devices to mitigate challenges
- 6.1 Introduction
- 6.2 Si electronics and scaling challenges
- 6.3 Alternative materials to sustain Moore's Law
- 6.4 High electron mobility transistors
- 6.4.1 Motivation
- 6.4.2 Principle, structure, and operation
- 6.4.3 Modeling: analytical and numerical
- 6.4.4 Current status of research
- 6.4.5 Applications
- 6.4.6 Future trends
- 6.5 Carbon nanotube
- 6.5.1 Structure and properties
- 6.5.2 Synthesis.
- 6.5.3 Carbon nanotube-based devices: progress and status
- 6.5.4 Applications
- 6.5.5 Future prospects
- 6.6 Graphene and other two-dimensional materials
- 6.6.1 Structure and properties
- 6.6.2 Synthesis
- 6.6.3 Graphene-based devices
- 6.6.4 Modeling and simulation
- 6.6.5 Applications
- 6.6.6 Recent progress
- 6.6.7 Future scenario
- References
- 7 End of the road map: quest for beyond Si CMOS era
- 7.1 Introduction
- 7.2 Is it the end of Moore's Law?
- 7.3 Extending CMOS: beyond CMOS technologies
- 7.3.1 Tunnel FET: working principle and challenges
- 7.4 More than Moore: system-on-chip and system-on-package concepts
- 7.5 Conclusions
- References
- 8 Low dimensional materials in nanoelectronics
- 8.1 Introduction to low dimensional semiconductors
- 8.2 Electronic properties of low dimensional semiconductors
- 8.2.1 Quantum well
- 8.2.2 Quantum wire
- 8.2.3 Quantum dot
- 8.3 Transition from large scale to (nanoscale) quantum regime
- 8.3.1 What is quantum regime?
- 8.3.2 Why is it necessary to understand the quantum behavior?
- 8.4 Quantum effects in nanoelectronic and opto-electronic properties of low dimensional semiconductors
- 8.4.1 Tunable bandgap
- 8.4.2 Blue shift in absorption spectra
- 8.4.3 Density of states
- 8.4.4 Large surface-to-volume ratio
- 8.4.5 Multiple exciton generation
- 8.5 Quantum effects in nanoscale electronics devices
- 8.5.1 Drift effects in nanoscale devices
- 8.5.1.1 Drift velocity overshoot
- 8.5.1.2 Ballistic transport
- 8.5.1.3 Hot electron effect
- 8.5.1.4 Hot phonon effects
- 8.5.2 Diffusion effects in nanoscale devices
- 8.5.2.1 Hot electron diffusion
- 8.5.2.2 Diffusion and reduced dimensionality
- 8.5.2.3 Size effects
- 8.5.3 Generation-recombination effects
- 8.5.3.1 G-R noise
- 8.5.3.2 Impact ionization
- 8.5.4 Solid state physics/electronics effects.
- 8.5.4.1 Quantum transport
- 8.5.4.2 Modeling approaches for nanoscale devices
- 8.5.5 Poisson equation-based approach
- 8.5.5.1 Coupled Schrodinger-Poisson equation-based approach
- 8.5.5.2 Future trends and scopes in nanodevices
- References
- 9 An overview of nanoscale device fabrication technology-part I
- 9.1 Introduction
- 9.2 Manufacture of integrated circuits
- 9.2.1 Epitaxy
- 9.2.1.1 The Si/SiGe molecular beam epitaxy system
- 9.2.1.2 Solid source molecular beam epitaxy
- 9.2.1.3 Gas source molecular beam epitaxy
- 9.2.2 Atomic force microscopy: characterization
- 9.2.3 Atomic layer deposition
- 9.2.4 Lithography
- 9.2.4.1 Emerging lithography techniques
- 9.2.4.2 Electronic (e-beam) lithography
- 9.2.4.3 Multi e-beam lithography
- 9.2.5 Etching
- 9.2.5.1 Plasma etching
- 9.2.5.2 Mechanisms of plasma etching
- 9.3 Conclusion
- References
- 10 An overview of nanoscale device fabrication technology-part II
- 10.1 Introduction
- 10.1.1 Motivation of the work
- 10.2 Optical proximity corrections
- 10.3 Nanopatterning using laser
- 10.4 Nanofabrication based on self-assembly
- 10.5 Alternative nanofabrication approaches for non-CMOS applications
- 10.6 Conclusion
- References
- 11 Flexible electronics and devices with new materials
- 11.1 Introduction
- 11.2 Thin-film transistors
- 11.2.1 Structure
- 11.2.2 Operation
- 11.2.3 Performance
- 11.2.3.1 Electrical stability
- 11.2.3.2 Mechanical stability
- 11.2.4 a-Si:H thin-film transistors
- 11.2.5 Organic thin-film transistors
- 11.2.5.1 Organic semiconductors
- 11.2.5.2 Conduction mechanism
- 11.2.5.3 Charge transport in organic thin-film transistors
- 11.2.5.4 Performance
- 11.3 High-performance flexible thin-film transistors
- 11.4 Materials and devices for biodegradability and green electronics
- 11.5 Summary
- References.
- 12 Emerging non-CMOS devices and technologies
- 12.1 Electrostatics-based electrical quantum-dot cellular automata
- 12.2 Tunneling-based nanodevices
- 12.2.1 Tunnel field-effect transistors
- 12.2.2 Single electron transistors
- 12.2.3 Resonant tunneling diodes
- 12.3 Magnetostatics based magnetic quantum-dot cellular automata
- 12.4 Conductive polymer-based devices: CMOS-nanowire-molecular structure
- 12.5 Electric dipole-based devices
- 12.5.1 Negative capacitance field-effect transistors
- 12.5.2 Spin-based device
- 12.5.3 Orbital state-based devices: Bisfield-effect transistors
- 12.6 Nanoionic switching devices
- 12.6.1 Introduction to nanoionic switching devices
- 12.6.2 Design of nanoionic switching devices
- 12.6.2.1 Electrochemical metallization type
- 12.6.2.2 Valance change memory type
- 12.6.3 Defect engineering of nanoionic switching devices
- 12.6.4 Application of nanoionics switching devices
- 12.6.5 Summary of nanoionic switching devices
- 12.7 Introduction to silicon nano tube field-effect transistor
- 12.8 Conclusion
- References
- 13 Emerging memories and their applications in neuromorphic computing
- 13.1 Introduction
- 13.1.1 Resistive random access memory
- 13.1.2 Phase change memory
- 13.1.3 Ferroelectric resistive random access memory
- 13.2 Ferroelectric memories
- 13.2.1 Ferroelectric random-access memory
- 13.2.2 Ferroelectric field-effect transistor
- 13.3 Resistive memories
- 13.3.1 Resistance switching modes and mechanism
- 13.3.2 Multilevel resistive switching in resistive random access memory
- 13.3.3 Modeling of resistive memories
- 13.3.3.1 Stanford/ASU model
- 13.3.3.2 Physical electrothermal model
- 13.3.4 Applications of resistive random access memory
- 13.3.4.1 RRAM as binary logic circuit
- 13.3.4.2 RRAM as synaptic device
- 13.3.4.3 RRAM as nonvolatile memory.