Seligman, E., Schubert, T., & Kumar, M. V. A. K. (2015). Formal verification: An essential toolkit for modern VLSI design. Elsevier Science.
Chicago Style (17th ed.) CitationSeligman, Erik, Tom Schubert, and M. V. Achutha Kiran Kumar. Formal Verification: An Essential Toolkit for Modern VLSI Design. Amsterdam: Elsevier Science, 2015.
MLA (9th ed.) CitationSeligman, Erik, et al. Formal Verification: An Essential Toolkit for Modern VLSI Design. Elsevier Science, 2015.
Warning: These citations may not always be 100% accurate.