rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Handbook of VLSI chip design and expert systems
  title info:
    title: VLSI chip design and expert systems
  name:
    name part: Schwarz, A. F.
    role:
      role term: creator
  name:
    name part: ScienceDirect (Online service)
  type of resource: text
  genre: bibliography
  genre: Electronic books.
  origin info:
    place:
      place term: enk
    date issued: 1993
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: remote
    extent: 1 online resource (viii, 582 pages) : illustrations
  abstract: Handbook of VLSI Chip Design and Expert Systems.
  table of contents: Front Cover; Handbook of VLSI Chip Design and Expert Systems; Copyright Page; PREFACE; Acknowledgments; Table of Contents; Chapter 1. VLSI CHIP DESIGN; 1.1 COMPUTER-AIDED CIRCUIT AND SYSTEM DESIGN; 1.2 CADCAS TOOLS IN CHIP DESIGN; 1.3 COMPUTERS AND ARTIFICIAL INTELLIGENCE; Chapter 2. PROGRAMMING TOOLS IN CHIP DESIGN; 2.1 PERSONAL COMPUTERS; 2.2 OPERATING SYSTEMS; 2.3 DATABASE SYSTEMS AND COMPUTER NETWORKS; Chapter 3. NEW DEVELOPMENTS IN PROGRAMMING; 3.1 FOURTH-GENERATION LANGUAGES; 3.2 NON VON NEUMANN ARCHITECTURES; 3.3 ARTIFICIAL INTELLIGENCE; 3.4 LISP; 3.5 LOGIC PROGRAMMING.
  table of contents: 3.6 THE OBJECT-ORIENTED ENVIRONMENTChapter 4. EXPERT SYSTEMS; 4.1 EXPERT SYSTEM FUNDAMENTALS; 4.2 KNOWLEDGE REPRESENTATION; 4.3 KNOWLEDGE PROCESSING; 4.4 PROGRAMMING ENVIRONMENTS; 4.5 APPLICATIONS OF EXPERT SYSTEMS; Chapter 5. VLSI SYSTEM DESIGN AND EXPERT SYSTEMS; 5.1 LOGIC-CIRCUIT DESIGN; 5.2 HIGH-LEVEL SYSTEM DESIGN; 5.3 ASIC DESIGN; Chapter 6. DESIGN VERIFICATION AND EXPERT SYSTEMS; 6.1 SYSTEM SIMULATION; 6.2 LOGIC SIMULATION; 6.3 CIRCUIT SIMULATION; Chapter 7. VLSI TESTING AND EXPERT SYSTEMS; 7.1 FAULT DIAGNOSIS; 7.2 TEST GENERATION; 7.3 DESIGN FOR TESTABILITY.
  table of contents: Chapter 8. LAYOUT DESIGN AND EXPERT SYSTEMS8.1 PLACEMENT AND ROUTING; 8.2 LAYOUT DESIGN OF BLOCK STRUCTURES; 8.3 LOCAL ROUTING; 8.4 LAYOUT VERIFICATION; Chapter 9. MODERN DESIGN METHODOLOGIES; 9.1 HUMAN-COMPUTER INTERACTION; 9.2 WORKSTATIONS FOR CHIP DESIGN; 9.3 PROBLEM-SOLVING TOOLS; REFERENCES; INDEX.
  note: A.F. Schwarz.
  note: Includes bibliographical references (pages 515-565) and index.
  subject:
    topic: Integrated circuits
    topic: Very large scale integration
    topic: Design and construction
    topic: Data processing
  subject:
    topic: Artificial intelligence
  subject:
    topic: Expert systems (Computer science)
  subject:
    topic: Artificial Intelligence
  subject:
    topic: Expert Systems
  subject:
    topic: Intelligence artificielle
  subject:
    topic: Systèmes experts (Informatique)
  subject:
    topic: artificial intelligence
  subject:
    topic: TECHNOLOGY & ENGINEERING
    topic: Mechanical
  subject:
    topic: Artificial intelligence
  subject:
    topic: Expert systems (Computer science)
  subject:
    topic: Integrated circuits
    topic: Very large scale integration
    topic: Design and construction
    topic: Data processing
  subject:
    topic: Entwurf
  subject:
    topic: Expertensystem
  subject:
    topic: VLSI
  subject:
    topic: Systèmes experts (informatique)
  subject:
    topic: Circuits intégrés à grande échelle (Informatique)
  classification: TK7874 .S392 1993eb
  classification: 621.395
  classification: ZN 4950
  classification: ELT 272f
  related item:
    title info:
      title: Handbook of VLSI chip design and expert systems
    name:
      name part: Schwarz, A.F.
    identifier: (OCoLC)28377991
  identifier: 9781483258058
  identifier: 148325805X
  identifier: 0126324255
  identifier: 9780126324259
  identifier: http://proxy.library.tamu.edu/login
  record info:
    record content source: OPELS
    record creation date: 141027
    record change date: 20260326211531.3
    record identifier: in00005757369
    language of cataloging:
      language term: eng