rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Cache and memory hierarchy design
    sub title: a performance-directed approach
  name:
    name part: Przybylski, Steven A.
    role:
      role term: creator
  name:
    name part: ScienceDirect (Online service)
  type of resource: text
  genre: bibliography
  genre: Electronic books.
  origin info:
    place:
      place term: cau
    place:
      place term: San Mateo, Calif
    publisher: Morgan Kaufmann Publishers
    date issued: ©1990
    date issued: 1990
    issuance: monographic
  language:
    language term: eng
  physical description:
    reformatting quality: access
    form: remote
    extent: 1 online resource (xiii, 223 pages) : illustrations
  abstract: An authoritative book for hardware and software designers. Caches are by far the simplest and most effective mechanism for improving computer performance. This innovative book exposes the characteristics of performance-optimal single and multi-level cache hierarchies by approaching the cache design process through the novel perspective of minimizing execution times. It presents useful data on the relative performance of a wide spectrum of machines and offers empirical and analytical evaluations of the underlying phenomena. This book will help computer professionals appreciate the impact of caches and enable designers to maximize performance given particular implementation constraints.
  table of contents: Front Cover; Cache and Memory Hierarchy Design: A Performance-Directed Approach; Copyright Page; Preface; Table of Contents; Symbols; Chapter 1. Introduction; Chapter 2. Background Material; 2.1. Terminology; 2.2. Previous Cache Studies; 2.3. Analytical Modelling; 2.4. Temporal Analysis in Cache Design; 2.5. Multi-Level Cache Hierarchies; Chapter 3. The Cache Design Problem and Its Solution; 3.1. Problem Description; 3.2. Two Complementary Approaches; 3.3. Experimental Method; 3.4. Analytical Approach; Chapter 4. Performance-Directed Cache Design; 4.1. Speed -- Size Tradeoffs.
  table of contents: 4.2. Speed -- Set Size Tradeoffs4.3. Block Size -- Memory Speed Tradeoffs; 4.4. Globally Optimum Cache Design; Chapter 5. Multi-Level Cache Hierarchies; 5.1. Introduction; 5.2. Motivation; 5.3. Intermediate Cache Design; 5.4. Optimal Memory Hierarchy Design; 5.5. A Detailed Example; 5.6. Fundamental Limits to Performance; 5.7. Summary; Chapter 6. Summary, Implications and Conclusions; 6.1. Summary; 6.2. The Implications of Performance-Directed Cache Design; Appendix A: Validation of the Empirical Results; A.1. The VAX Traces; A.2. The R2000 Traces; A.3. Combining the R2000 and the VAX Results.
  table of contents: Appendix B: Modelling Write Strategy EffectsReferences; Index.
  note: Steven A. Przybylski.
  note: Master and use copy. Digital master created according to Benchmark for Faithful Digital Reproductions of Monographs and Serials, Version 1. Digital Library Federation, December 2002. http://purl.oclc.org/DLF/benchrepro0212 MiAaHDL
  note: digitized 2010 HathiTrust Digital Library committed to preserve pda MiAaHDL
  note: Includes bibliographical references (pages 207-219) and index.
  note: English.
  subject:
    topic: Cache memory
  subject:
    topic: Memory hierarchy (Computer science)
  subject:
    topic: Antémémoire
  subject:
    topic: Hiérarchie de mémoires (Informatique)
  subject:
    topic: TECHNOLOGY & ENGINEERING
    topic: Mechanical
  subject:
    topic: Cache memory
  subject:
    topic: Memory hierarchy (Computer science)
  subject:
    topic: Cache-Speicher
  subject:
    topic: Pufferspeicher
  subject:
    topic: Speicherhierarchie
  classification: TK7895.M4 P79 1990
  classification: 621.39/73
  classification: ST 175
  related item:
    title info:
      title: Cache and memory hierarchy design
    name:
      name part: Przybylski, Steven A.
    origin info:
      publisher: San Mateo, Calif. : Morgan Kaufmann Publishers, ©1990
    identifier: (DLC) 90006007
    identifier: (OCoLC)21410671
  related item:
    title info:
      title: Morgan Kaufmann Series in Computer Architecture and Design
  identifier: 9780080500591
  identifier: 0080500595
  identifier: 1558601368
  identifier: 9781558601369
  identifier: 0558601368
  identifier: 9781493303502
  identifier: 1493303503
  identifier: CL0501000140 Safari Books Online
  identifier: http://proxy.library.tamu.edu/login
  record info:
    record content source: OCLCE
    record creation date: 100630
    record change date: 20260326175525.8
    record identifier: in00005743444
    language of cataloging:
      language term: eng