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Complex Digital Hardware Design

This book is about how to design the most complex types of digital circuit boards used inside servers and routers, from high-level system architecture down to the low-level signal integrity concepts. It explains common structures and subsystems that can be expanded into new designs in different mark...

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Bibliographic Details
Main Author: Nagy, Istvan
Format: Electronic eBook
Language:English
Published: Milton : Taylor & Francis Group, 2024.
Subjects:
Digital electronics.
Electronic digital computers > Design and construction.
Électronique numérique.
Table of Contents:
  • Cover
  • Half Title
  • Title Page
  • Copyright Page
  • Table of Contents
  • About the Author
  • Chapter 1 Introduction
  • Book Organization
  • Chapter 2 Digital Circuits
  • 2.1 I/O Standards
  • 2.1.1 Terminations and Reflections
  • 2.1.2 PAM4 versus NRZ Signaling
  • 2.1.3 Level Translation
  • 2.1.4 Protocols
  • 2.2 JTAG
  • 2.3 External Parallel Interface
  • 2.3.1 Synchronous Mode
  • 2.3.2 Asynchronous Mode
  • 2.3.3 Wait States
  • 2.3.4 Multi-Master Arbitration
  • 2.4 SERDES IP
  • 2.4.1 SERDES Signals
  • 2.4.2 Tile Architecture
  • 2.4.3 Transmit Signal Path
  • 2.4.4 Receive Signal Path
  • 2.5 Button or Switch Debouncing
  • 2.6 ESD
  • 2.7 Data Corruption
  • 2.7.1 SEU
  • 2.8 Security
  • Chapter 3 Major Interfaces
  • 3.1 Ethernet
  • 3.1.1 Protocol
  • 3.1.2 External and Backplane Ports
  • 3.1.3 MAC-PHY Interfaces
  • 3.1.4 Optical Ethernet Ports
  • 3.1.5 Base-T Type Ethernet Coupling
  • 3.2 PCI and PCIe
  • 3.2.1 The PCI Bus
  • 3.2.1.3 PCI-X
  • 3.2.2 PCI Express
  • 3.2.3 Configuration
  • 3.3 Common HB Interfaces
  • 3.3.1 SATA
  • 3.3.2 USB 3.0
  • 3.3.3 Computer Video
  • 3.3.4 JESD204x
  • 3.3.5 Data Center Chassis-to-Chassis Interconnects
  • 3.4 High Performance Computing Links
  • Chapter 4 Power Supply Circuits
  • 4.1 Global Power Circuits
  • 4.1.1 Chassis Input Power
  • 4.1.2 Board Input Power
  • 4.2 Voltage Regulator Modules (VRM)
  • 4.2.1 VRM Architectures
  • 4.2.2 Basic Buck VRM Operation
  • 4.2.3 Strapping and Settings
  • 4.2.4 VRM Chip Features
  • 4.2.5 VRM Control Loop Types
  • 4.2.6 Feedback Loop Compensation
  • 4.2.7 VRM Analysis
  • Chapter 5 Components
  • 5.1 Resistors
  • 5.2 Capacitors
  • 5.3 Inductors
  • 5.4 LEDs
  • 5.5 Transistor Circuits
  • 5.6 Small Logic ICs
  • 5.7 Super I/O Chips
  • 5.8 Clocking Chips
  • 5.9 PHY and Gearbox Chips
  • 5.10 Retimer Chips
  • 5.11 Peripheral Controllers
  • 5.11.1 Ethernet NIC
  • 5.11.2 SATA/SAS Controller Chips
  • 5.11.3 USB Chips
  • 5.12 PCIe Bridging and Switching
  • 5.12.1 PCI-to-PCI Bridges (P2PB)
  • 5.12.2 PCIe-to-PCI Bridges (PE2PB)
  • 5.12.3 PCIe Switches (PESW)
  • 5.12.4 Configuring the Devices
  • 5.12.5 Switch Devices for Other Protocols
  • 5.13 High-Speed ADCs
  • 5.14 Basic Connectors
  • 5.15 High-Speed Connectors
  • 5.16 Optical Cage Connectors
  • 5.17 Mechanical Parts
  • 5.17.1 Heatsinks
  • 5.18 Flyover Cables
  • 5.19 Memory
  • 5.19.1 Non-volatile Memories
  • 5.19.2 Volatile Memories
  • 5.19.3 DDRx SDRAM Types
  • Chapter 6 Main Chips
  • 6.1 Processors
  • 6.1.1 Microcontrollers
  • 6.1.2 ARM Processors
  • 6.1.3 DSPs
  • 6.1.4 PowerPC
  • 6.1.5 Soft Processors
  • 6.1.6 X86 CPUs and Chipsets
  • 6.2 FPGAs
  • 6.2.1 FPGA Basics
  • 6.2.2 FPGA Families
  • 6.2.3 FPGA Resources
  • 6.2.4 FPGA Pinout Planning
  • 6.2.5 Development Flow
  • 6.3 ASICs
  • 6.3.1 Ethernet Switch ASICs
  • 6.3.2 GPUs
  • 6.3.3 AI ASICs
  • 6.3.4 Accelerator ASICs
  • 6.3.5 Search and TCAM ASICs
  • Chapter 7 Hardware Architecture
  • 7.1 Building Blocks
  • 7.2 Computers
  • 7.2.1 System Buses
  • 7.2.2 System Initialization