Description
Abstract:This book focusses on the spacer engineering aspects of novel MOS-based device circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.
Physical Description:1 online resource
Bibliography:Includes bibliographical references.
ISBN:9781351751049
1351751042
9781315191089
1315191083
9781498783606
1498783600