http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
1 online resource (xxii, 458 pages) : illustrations.
A comprehensive guide to 3D IC integration and packaging methods, solutions, and real-world applications.
A. About the Author -- B. Preface -- C. Acknowledgments -- 1. 3D Integration for Semiconductor IC Packaging -- Introduction -- 3D Integration -- 3D IC Packaging -- 3D Si Integration -- 3D IC Integration -- Supply Chains before the TSV Era -- Supply Chains for the TSV Era?Who Makes the TSV? -- Supply Chains for the TSV Era?Who Does the MEOL, Assembly, and Test? -- CMOS Images Sensors with TSVs -- MEMS with TSVs -- References -- 2. Through-Silicon Vias Modeling and Testing -- Introduction -- Electrical Modeling of TSVs -- Thermal Modeling of TSVs -- Mechanical Modeling and Testing of TSVs -- References -- 3. Stress Sensors for Thin-Wafer Handling and Strength Measurement -- Introduction -- Design and Fabrication of Piezoresistive Stress Sensors -- Application of Stress Sensors in Thin-Wafer Handling -- Application of Stress Sensors in Wafer Bumping -- Application of Stress Sensors in Drop Test of Embedded Ultrathin Chips -- References -- 4. Package Substrate Technologies -- Introduction -- Package Substrate with Build-up Layers for Flip Chip 3D IC Integration -- Coreless Package Substrates -- Recent Advance of Package Substrate with Build-up Layer -- References -- 5. Microbumps: Fabrication, Assembly, and Reliability -- Introduction -- Fabrication, Assembly, and Reliability of 25-?m-Pitch Microbumps -- Fabrication, Assembly, and Reliability of 20-?m-Pitch Microbumps -- Fabrication, Assembly, and Reliability of 15-?m-Pitch Microbumps -- References -- 6. 3D Si Integration -- Introduction -- The Electronic Industry -- Moore's Law and More-Than-Moore -- The Origin of 3D Integration -- Overview and Outlook of 3D Si Integration -- 3D Si Integration Technology Challenges -- 3D Si Integration EDA Challenges -- Summary and Recommendations -- References -- 7. 2.5D/3D IC Integration -- Introduction -- TSV Process for 3D IC Integration -- The Potential Application of 3D IC Integration -- Memory-Chip Stacking -- Wide I/O Memory or Logic-on-Logic -- Wide I/O DRAM or Hybrid Memory Cube -- Wide I/O 2 and High Bandwidth Memory -- Wide I/O Interface (2.5D IC Integration) -- Thin-Wafer Handling -- References -- 8. 3D IC Integration with Passive Interposer -- Introduction.
3D IC Integration with TSV/RDL Interposer -- TSV/RDL Interposer with Double-Sided Chip Attachments -- TSV Interposer with Chips on Both Sides -- Low-Cost TSH Interposer for 3D IC Integration -- References -- 9. Thermal Management of 2.5D/3D IC Integration -- Introduction -- Design Philosophy -- The New Design -- Equivalent Model for Thermal Analysis -- Interposer with Chip/Heat Spreader on Its Top Side and Chip on Its Bottom Side -- Interposer with Chip/Heat Spreader on Its Top Side and Chip/Heat Slug on Its Bottom Side -- Interposer with Four Chips on Its Top Side with Heat Spreader -- Thermal Performance between 2.5D and 3D IC Integrations -- Thermal Management System with TSV Interposers with Embedded Microchannels -- References -- 10. Embedded 3D Hybrid Integration -- Introduction -- Trends of Optoelectronic Products -- The Old Design?High-Frequency Data Link on PCB Using Optical Waveguides -- The Old Design?Embedded Board-Level Optical Interconnects -- The New Designs -- An Embedded 3D Hybrid Integration Design Example -- Semi-Embedded TSV Interposer with Stress Relief Gap -- References -- 11. 3D LED and IC Integration -- Introduction -- Status and Outlook of Haitz's Law -- LED Has Come a Long Way! -- Four Key Segments of LED Products -- 3D LED and IC Integration -- 2.5D IC and LED Integration -- Thermal Management of 3D LED and IC Integration -- References -- 12. 3D MEMS and IC Integration -- Introduction -- MEMS Packaging -- Design of 3D MEMS and IC Integration -- Assembly Process of 3D MEMS and IC Integration -- Low-Temperature Bonding of 3D MEMS Packaging with Solders -- Recent Developments in Advanced MEMS Packaging -- References -- 13. 3D CMOS Image Sensor and IC Integration -- Introduction -- FI-CIS and BI-CIS -- 3D CIS and IC Stacking -- 3D CIS and IC Integration -- Summary and Recommendations -- References -- 14. 3D IC Packaging -- Introduction -- Chip Stacking by Wirebonding -- Package-on-Package (PoP) -- Wafer-Level Packaging -- Fan-Out eWLP -- Embedded Panel-Level Packaging -- Summary and Recommendations -- References.
Electronic reproduction. New York, N.Y. : McGraw Hill, 2016. Mode of access: World Wide Web. System requirements: Web browser. Access may be restricted to users at subscribing institutions.
Mode of access: Internet via World Wide Web.
Includes bibliographical references and index.
New York, N.Y. : McGraw-Hill Education, 2016