Digital logic, RTL & Verilog : interview questions : a practical study guide for design engineers /
| Main Author: | |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
[United States] :
Verilogcode.com,
[2016]
|
| Edition: | Revision 1.6 August 2016 |
| Subjects: |
Table of Contents:
- Introduction
- RTL Verilog syntax questions
- RTL logic design questions
- Clock dividers, clock gating, and reset questions
- Clock domain crossing questions
- Power related design questions
- Digital logic questions
- Logical thinking questions
- Answers to logical questions
- Further reading and studying on your own
- Personal interview notes and questions
- Credit and sources.