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Fundamentals of Digital Logic with Verilog Design.

Bibliographic Details
Main Author: Brown, Stephen
Corporate Author: ProQuest (Firm)
Format: eBook
Language:English
Published: New York : McGraw-Hill US Higher Ed USE Legacy, 2013.
Edition:3rd ed.
Subjects:
Computer hardware description languages.
Electronic books.
Online Access:Connect to the full text of this electronic book
Table of Contents:
  • Cover
  • Title
  • Copyright
  • Contents
  • Chapter 1 Introduction
  • 1.1 Digital Hardware
  • 1.1.1 Standard Chips
  • 1.1.2 Programmable Logic Devices
  • 1.1.3 Custom-Designed Chips
  • 1.2 The Design Process
  • 1.3 Structure of a Computer
  • 1.4 Logic Circuit Design in This Book
  • 1.5 Digital Representation of Information
  • 1.5.1 Binary Numbers
  • 1.5.2 Conversion between Decimal and Binary Systems
  • 1.5.3 ASCII Character Code
  • 1.5.4 Digital and Analog Information
  • 1.6 Theory and Practice
  • Problems
  • References
  • Chapter 2 Introduction to Logic Circuits
  • 2.1 Variables and Functions
  • 2.2 Inversion
  • 2.3 Truth Tables
  • 2.4 Logic Gates and Networks
  • 2.4.1 Analysis of a Logic Network
  • 2.5 Boolean Algebra
  • 2.5.1 The Venn Diagram
  • 2.5.2 Notation and Terminology
  • 2.5.3 Precedence of Operations
  • 2.6 Synthesis Using AND, OR, and NOT Gates
  • 2.6.1 Sum-of-Products and Product-of-Sums Forms
  • 2.7 NAND and NOR Logic Networks
  • 2.8 Design Examples
  • 2.8.1 Three-Way Light Control
  • 2.8.2 Multiplexer Circuit
  • 2.8.3 Number Display
  • 2.9 Introduction to CAD Tools
  • 2.9.1 Design Entry
  • 2.9.2 Logic Synthesis
  • 2.9.3 Functional Simulation
  • 2.9.4 Physical Design
  • 2.9.5 Timing Simulation
  • 2.9.6 Circuit Implementation
  • 2.9.7 Complete Design Flow
  • 2.10 Introduction to Verilog
  • 2.10.1 Structural Specification of Logic Circuits
  • 2.10.2 Behavioral Specification of Logic Circuits
  • 2.10.3 Hierarchical Verilog Code
  • 2.10.4 How NOT to Write Verilog Code
  • 2.11 Minimization and Karnaugh Maps
  • 2.12 Strategy for Minimization
  • 2.12.1 Terminology
  • 2.12.2 Minimization Procedure
  • 2.13 Minimization of Product-of-Sums Forms
  • 2.14 Incompletely Specified Functions
  • 2.15 Multiple-Output Circuits
  • 2.16 Concluding Remarks
  • 2.17 Examples of Solved Problems
  • Problems
  • References
  • Chapter 3 Number Representation and Arithmetic Circuits
  • 3.1 Positional Number Representation
  • 3.1.1 Unsigned Integers
  • 3.1.2 Octal and Hexadecimal Representations
  • 3.2 Addition of Unsigned Numbers
  • 3.2.1 Decomposed Full-Adder
  • 3.2.2 Ripple-Carry Adder
  • 3.2.3 Design Example
  • 3.3 Signed Numbers
  • 3.3.1 Negative Numbers
  • 3.3.2 Addition and Subtraction
  • 3.3.3 Adder and Subtractor Unit
  • 3.3.4 Radix-Complement Schemes*
  • 3.3.5 Arithmetic Overflow
  • 3.3.6 Performance Issues
  • 3.4 Fast Adders
  • 3.4.1 Carry-Lookahead Adder
  • 3.5 Design of Arithmetic Circuits Using CAD Tools
  • 3.5.1 Design of Arithmetic Circuits Using Schematic Capture
  • 3.5.2 Design of Arithmetic Circuits Using Verilog
  • 3.5.3 Using Vectored Signals
  • 3.5.4 Using a Generic Specification
  • 3.5.5 Nets and Variables in Verilog
  • 3.5.6 Arithmetic Assignment Statements
  • 3.5.7 Module Hierarchy in Verilog Code
  • 3.5.8 Representation of Numbers in Verilog Code
  • 3.6 Multiplication
  • 3.6.1 Array Multiplier for Unsigned Numbers
  • 3.6.2 Multiplication of Signed Numbers
  • 3.7 Other Number Representations