rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Intel Xeon Phi Processor High Performance Programming, 2nd Edition
  name:
    name part: Jeffers, James
    role:
      role term: creator
    role:
      role term: author.
  name:
    name part: Reinders, James
    role:
      role term: author.
  name:
    name part: Sodani, Avinash
    role:
      role term: author.
  name:
    name part: Safari, an O'Reilly Media Company
  type of resource: text
  genre: Electronic books.
  origin info:
    place:
      place term: xx
    date issued: 2016
    edition: 2nd edition.
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: remote
    extent: 1 online resource (662 pages)
  abstract: Intel Xeon Phi Processor High Performance Programming is an all-in-one source of information for programming the Second-Generation Intel Xeon Phi product family also called Knights Landing. The authors provide detailed and timely Knights Landingspecific details, programming advice, and real-world examples. The authors distill their years of Xeon Phi programming experience coupled with insights from many expert customers - Intel Field Engineers, Application Engineers, and Technical Consulting Engineers - to create this authoritative book on the essentials of programming for Intel Xeon Phi products. Intel® Xeon Phi™ Processor High-Performance Programming is useful even before you ever program a system with an Intel Xeon Phi processor. To help ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi processors, or other high-performance microprocessors. Applying these techniques will generally increase your program performance on any system and prepare you better for Intel Xeon Phi processors. A practical guide to the essentials for programming Intel Xeon Phi processors Definitive coverage of the Knights Landing architecture Presents best practices for portable, high-performance computing and a familiar and proven threads and vectors programming model Includes real world code examples that highlight usages of the unique aspects of this new highly parallel and high-performance computational product Covers use of MCDRAM, AVX-512, Intel® Omni-Path fabric, many-cores (up to 72), and many threads (4 per core) Covers software developer tools, libraries and programming models Covers using Knights Landing as a processor and a coprocessor
  note: Jeffers, James.
  note: Electronic resource.
  note: Electronic reproduction. Boston, MA : Safari, Available via World Wide Web. 2016.
  note: Mode of access: World Wide Web.
  identifier: 9780128091951
  identifier: 9780128091944
  identifier: https://proxy.library.tamu.edu/login
  record info:
    record creation date: 131016
    record change date: 20260129224952.6
    record identifier: in00004215544