Power-efficient computer architectures : recent advances /

Bibliographic Details
Main Authors: Själander, Magnus, 1977- (Author), Kaxiras, Stefanos (Author), Martonosi, Margaret (Author)
Format: eBook
Language:English
Published: San Rafael, California (1537 Fourth Street, San Rafael, CA 94901 USA) : Morgan & Claypool, 2015.
Series:Synthesis lectures in computer architecture ; # 30.
Subjects:
Online Access:Connect to the full text of this electronic book
Description
Abstract:As Moore's Law and Dennard scaling trends have slowed, the challenges of building high-performance computer architectures while maintaining acceptable power efficiency levels have heightened. Over the past ten years, architecture techniques for power efficiency have shifted from primarily focusing on module-level efficiencies, toward more holistic design styles based on parallelism and heterogeneity. This work highlights and synthesizes recent techniques and trends in power-efficient computer architecture.
Physical Description:1 online resource (xi, 84 pages) : illustrations.
Also available in print.
Format:Mode of access: World Wide Web.
System requirements: Adobe Acrobat Reader.
Bibliography:Includes bibliographical references (pages 61-81).
ISBN:9781627056465
ISSN:1935-3243 ;
DOI:10.2200/S00611ED1V01Y201411CAC030
Access:Abstract freely available; full-text restricted to subscribers or individual document purchasers.