Digital logic design using Verilog : coding and RTL synthesis /

This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. This book is organized in such a way that that it can describe a number of RTL design scenarios, from simple to complex...

Full description

Bibliographic Details
Main Author: Taraate, Vaibbhav (Author)
Format: Book
Language:English
Published: India : Springer, 2016.
Subjects:
Description
Summary:This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. This book is organized in such a way that that it can describe a number of RTL design scenarios, from simple to complex. The book constructs the logic design story from the fundamentals of logic design to advanced RTL design concepts. Keeping in view the importance of miniaturization today, the book gives practical information on the issues with ASIC RTL design and how to overcome these concerns. It clearly explains how to write an efficient RTL code and how to improve design performance. The book also describes advanced RTL design concepts such as low-power design, multiple clock-domain design, and SOC-based design.
Physical Description:xxiii, 416 pages : illustrations (some color) ; 24 cm
Bibliography:Includes bibliographical references and index.
ISBN:8132227891
9788132227892