APA (7th ed.) Citation

Taraate, V. (2016). Digital logic design using Verilog: Coding and RTL synthesis. Springer.

Chicago Style (17th ed.) Citation

Taraate, Vaibbhav. Digital Logic Design Using Verilog: Coding and RTL Synthesis. India: Springer, 2016.

MLA (9th ed.) Citation

Taraate, Vaibbhav. Digital Logic Design Using Verilog: Coding and RTL Synthesis. Springer, 2016.