rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Formal verification
    sub title: an essential toolkit for modern VLSI design
  title info:
    title: Essential toolkit for modern VLSI design
  title info:
    title: Essential toolkit for modern very large-scale integration design
  name:
    name part: Seligman, Erik
    role:
      role term: creator
    role:
      role term: author.
  name:
    name part: Schubert, E. Thomas
    name part: 1959-
    role:
      role term: author.
  name:
    name part: Kumar, M. V. Achutha Kiran
    role:
      role term: author.
  type of resource: text
  genre: bibliography
  origin info:
    place:
      place term: ne
    date issued: 2015
    copyright date: 2015
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: print
    extent: xvii, 353 pages : illustrations ; 24 cm
  target audience: specialized
  note: Erik Seligman, Tom Schubert, M.V. Achutha Kiran Kumar.
  note: Includes bibliographical references and index.
  subject:
    topic: Electronic circuits
    topic: Testing
  subject:
    topic: Integrated circuits
    topic: Very large scale integration
    topic: Design and construction
  subject:
    topic: Verilog (Computer hardware description language)
  subject:
    topic: Electronic circuits
    topic: Testing
  subject:
    topic: Integrated circuits
    topic: Very large scale integration
    topic: Design and construction
  subject:
    topic: Verilog (Computer hardware description language)
  classification: TK7874.75 .S44 2015
  classification: 621.3/95
  identifier: 9780128007273 (pbk.)
  identifier: 0128007273 (pbk.)
  identifier: 9780128008157 (PDF ebook)
  record info:
    record content source: CDX
    record creation date: 150408
    record change date: 20160127110202.0
    record identifier: in00003595024
    language of cataloging:
      language term: eng