APA (7th ed.) Citation

Bhattacharya, D., & Hayes, J. P. (1990). Hierarchical Modeling for VLSI Circuit Testing. Springer US.

Chicago Style (17th ed.) Citation

Bhattacharya, Debashis, and John P. Hayes. Hierarchical Modeling for VLSI Circuit Testing. Boston, MA: Springer US, 1990.

MLA (9th ed.) Citation

Bhattacharya, Debashis, and John P. Hayes. Hierarchical Modeling for VLSI Circuit Testing. Springer US, 1990.