http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
This handbook provides a comprehensive treatment of area-array interconnections for both chips and microelectronic packages in terms of optimizing densification, functionality and reliability. It provides comparisons with alternative and competing technologies, clearly defining cost versus benefit tradeoffs and strategies. Process details are defined in the order of their typical manufacturing sequence, indicating tooling requirements and potential yield detractors. In addition, the handbook has individual chapters devoted to supporting disciplines that play a key role in satisfying the requirements of microelectronic package applications: efficient thermal-dissipation techniques, metallurgical and mechanical characteristics of interconnections and electrical design strategies. Area-array technology at both die and chip carrier levels offers the best opportunity of satisfying the demanding performance requirements that users at all levels of the product spectrum have come to expect. This handbook fully describes the `how and why' of the inherent elements of area-array technology that give rise to enhanced electrical and thermal dissipation capabilities, and densification to accommodate demanding design requirements, while at the same time accommodating size and cost reductions to enhance comfort and portability. This handbook is the only book that provides a complete and integrated treatment which includes all the aspects of area-array microelectronics. Each chapter is self contained, written in a clear, concise, easy-to-understand manner. It sets forth fundamentals followed by the application of those principles making prior knowledge of the subject material unnecessary in order to utilize this reference. The handbook will serve as an excellent text or companion reference for a variety of electronic packaging courses or workshops. FEATURES: describes all the key elements of microelectronic packaging technology; organized into three categories: die, chip carrier, and support technologies; presents information in a clear and concise manner; can be utilized as a textbook or companion reference for a range of microelectronic packaging courses; each chapter is self-contained; provides guidelines and strategies for making microelectronic packaging choices. ABOUT THE EDITORS: Considered `pioneers' in the field of microelectronics packaging, Karl Puttlitz and Paul Totta represent 80 years of experience in all aspects of the technology. They were key forces in the definition and implementation of flip-chip technology from its very inception at IBM and through its evolution during the past four decades. As major contributors in the development and manufacture of various microelectronics chip-carrier packages, the authors are frequently invited to speak at universities, international conferences and workshops.
edited by Karl J. Puttlitz, Paul A. Totta.