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Processor Architecture : From Dataflow to Superscalar and Beyond /

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This monograph surveys architectural mechanisms and implementation techniques for exploiting fine-grained and coarse-grained parallelism within microprocessors. It starts with a review of past techniques, continues with a comprehensive account of state-of-the-art techniques used in microprocessors t...

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Bibliographic Details
Main Author: Šilc, Jurij
Corporate Author: SpringerLink (Online service)
Other Authors: Robič, Borut, Ungerer, Theo
Format: eBook
Language:English
Published: Berlin, Heidelberg : Springer Berlin Heidelberg, 1999.
Subjects:
Computer science.
Electronic books.
Online Access:Connect to the full text of this electronic book
Table of Contents:
  • Basic Pipelining and Simple RISC Processors
  • Dataflow Processors
  • CISC Processors
  • Multiple-Issue Processors
  • Future Processors to use Fine-Grain Parallelism
  • Future Processors to use Coarse-Grain Parallelism
  • Processor-in-Memory, Reconfigurable and Asynchronous Processors
  • Acronyms
  • Glossary
  • References
  • Index.