Optimal VLSI Architectural Synthesis : Area, Performance and Testability /
| Main Author: | Gebotys, Catherine H. |
|---|---|
| Corporate Author: | SpringerLink (Online service) |
| Other Authors: | Elmasry, Mohamed I. |
| Format: | eBook |
| Language: | English |
| Published: |
Boston, MA :
Springer US,
1992.
|
| Series: | Kluwer international series in engineering and computer science. VLSI, computer architecture, and digital signal processing ;
158. |
| Subjects: | |
| Online Access: | Connect to the full text of this electronic book |
Similar Items
On Optimal Interconnections for VLSI /
by: Kahng, Andrew B.
Published: (1995)
by: Kahng, Andrew B.
Published: (1995)
High-Level VLSI Synthesis /
by: Camposano, Raul
Published: (1991)
by: Camposano, Raul
Published: (1991)
VLSI Synthesis of DSP Kernels : Algorithmic and Architectural Transformations /
by: Mehendale, Manesh
Published: (2001)
by: Mehendale, Manesh
Published: (2001)
Logic Synthesis for Low Power VLSI Designs /
by: Iman, Sasan
Published: (1998)
by: Iman, Sasan
Published: (1998)
Logic Synthesis and Optimization /
by: Sasao, Tsutomu
Published: (1993)
by: Sasao, Tsutomu
Published: (1993)
Interconnects in VLSI Design /
by: Grabinski, Hartmut
Published: (2000)
by: Grabinski, Hartmut
Published: (2000)
On-Line Testing for VLSI /
by: Nicolaidis, Michael
Published: (1998)
by: Nicolaidis, Michael
Published: (1998)
VLSI CAD Tools and Applications /
by: Fichtner, Wolfgang
Published: (1987)
by: Fichtner, Wolfgang
Published: (1987)
Power Optimization and Synthesis at Behavioral and System Levels Using Formal Methods /
by: Chang, Jui-Ming
Published: (1999)
by: Chang, Jui-Ming
Published: (1999)
Algorithms for VLSI Physical Design Automation /
by: Sherwani, Naveed
Published: (1995)
by: Sherwani, Naveed
Published: (1995)
Synthesis of Finite State Machines : Functional Optimization /
by: Kam, Timothy
Published: (1997)
by: Kam, Timothy
Published: (1997)
Synthesis of Finite State Machines : Logic Optimization /
by: Villa, Tiziano
Published: (1997)
by: Villa, Tiziano
Published: (1997)
Binary Decision Diagrams and Applications for VLSI CAD /
by: Minato, Shin-ichi
Published: (1996)
by: Minato, Shin-ichi
Published: (1996)
Digital Timing Macromodeling for VLSI Design Verification /
by: Kong, Jeong-Taek
Published: (1995)
by: Kong, Jeong-Taek
Published: (1995)
Circuit Synthesis with VHDL /
by: Airiau, Roland
Published: (1994)
by: Airiau, Roland
Published: (1994)
Logic Synthesis and Verification /
by: Hassoun, Soha
Published: (2002)
by: Hassoun, Soha
Published: (2002)
Sequential Logic Synthesis /
by: Ashar, Pranav
Published: (1992)
by: Ashar, Pranav
Published: (1992)
Function/Architecture Optimization and Co-Design of Embedded Systems /
by: Tabbara, Bassam
Published: (2000)
by: Tabbara, Bassam
Published: (2000)
Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics /
by: Khatri, Sunil P.
Published: (2001)
by: Khatri, Sunil P.
Published: (2001)
Logic Synthesis Using Synopsys® /
by: Kurup, Pran
Published: (1996)
by: Kurup, Pran
Published: (1996)
High - Level Synthesis : Introduction to Chip and System Design /
by: Gajski, Daniel D.
Published: (1992)
by: Gajski, Daniel D.
Published: (1992)
Understanding Behavioral Synthesis : a Practical Guide to High-Level Design /
by: Elliott, John P.
Published: (1999)
by: Elliott, John P.
Published: (1999)
Algorithms for Synthesis and Testing of Asynchronous Circuits /
by: Lavagno, Luciano
Published: (1993)
by: Lavagno, Luciano
Published: (1993)
VHDL Modeling for Digital Design Synthesis /
by: Hsu, Yu-Chin
Published: (1995)
by: Hsu, Yu-Chin
Published: (1995)
The Synthesis Approach to Digital System Design /
by: Michel, Petra
Published: (1992)
by: Michel, Petra
Published: (1992)
Advanced ASIC Chip Synthesis : Using Synopsys® Design CompilerTM and PrimeTime® /
by: Bhatnagar, Himanshu
Published: (1999)
by: Bhatnagar, Himanshu
Published: (1999)
Design Automation for Timing-Driven Layout Synthesis /
by: Sapatnekar, Sachin S.
Published: (1993)
by: Sapatnekar, Sachin S.
Published: (1993)
Practical Synthesis of High-Performance Analog Circuits /
by: Ochotta, Emil S.
Published: (1998)
by: Ochotta, Emil S.
Published: (1998)
Logic Synthesis for Field-Programmable Gate Arrays /
by: Murgai, Rajeev
Published: (1995)
by: Murgai, Rajeev
Published: (1995)
Co-Synthesis of Hardware and Software for Digital Embedded Systems /
by: Gupta, Rajesh Kumar
Published: (1995)
by: Gupta, Rajesh Kumar
Published: (1995)
High-Level Power Analysis and Optimization /
by: Raghunathan, Anand
Published: (1998)
by: Raghunathan, Anand
Published: (1998)
Timing Analysis and Optimization of Sequential Circuits /
by: Maheshwari, Naresh
Published: (1999)
by: Maheshwari, Naresh
Published: (1999)
High Level Synthesis of ASICs under Timing and Synchronization Constraints /
by: Ku, David C.
Published: (1992)
by: Ku, David C.
Published: (1992)
High-Level Synthesis for Real-Time Digital Signal Processing /
by: Vanhoof, Jan
Published: (1993)
by: Vanhoof, Jan
Published: (1993)
Algorithmic and Register-Transfer Level Synthesis: The System Architect's Workbench /
by: Thomas, D. E.
Published: (1990)
by: Thomas, D. E.
Published: (1990)
Timing Optimization Through Clock Skew Scheduling /
by: Kourtev, Ivan S.
Published: (2000)
by: Kourtev, Ivan S.
Published: (2000)
Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs /
by: Stanisic, Balsha R.
Published: (1996)
by: Stanisic, Balsha R.
Published: (1996)
Accelerator Data-Path Synthesis for High-Throughput Signal Processing Applications /
by: Geurts, Werner
Published: (1997)
by: Geurts, Werner
Published: (1997)
Sequential Optimization of Asynchronous and Synchronous Finite-State Machines : Algorithms and Tools /
by: Fuhrer, Robert M.
Published: (2001)
by: Fuhrer, Robert M.
Published: (2001)
Analog VLSI Implementation of Neural Systems /
by: Mead, Carver
Published: (1989)
by: Mead, Carver
Published: (1989)