APA (7th ed.) Citation

Monteiro, J., & Devadas, S. (1997). Computer-Aided Design Techniques for Low Power Sequential Logic Circuits. Springer US.

Chicago Style (17th ed.) Citation

Monteiro, José, and Srinivas Devadas. Computer-Aided Design Techniques for Low Power Sequential Logic Circuits. Boston, MA: Springer US, 1997.

MLA (9th ed.) Citation

Monteiro, José, and Srinivas Devadas. Computer-Aided Design Techniques for Low Power Sequential Logic Circuits. Springer US, 1997.

Warning: These citations may not always be 100% accurate.