High-Speed Clock Network Design /
High-Speed Clock Network Design is a collection of design concepts, techniques and research works from the author for clock distribution in microprocessors and high-performance chips. It is organized in 11 chapters.
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| Format: | eBook |
| Language: | English |
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Boston, MA :
Springer US,
2003.
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| Online Access: | Connect to the full text of this electronic book |
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