rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: High-Level Synthesis for Real-Time Digital Signal Processing
  name:
    name part: Vanhoof, Jan.
    role:
      role term: creator
  name:
    name part: Rompaey, Karl.
  name:
    name part: Bolsens, Ivo.
  name:
    name part: Goossens, Gert.
  name:
    name part: Man, Hugo.
  name:
    name part: SpringerLink (Online service)
  type of resource: text
  genre: Electronic books.
  origin info:
    place:
      place term: mau
    date issued: 1993
    issuance: monographic
  language:
    language term: eng
  physical description:
    reformatting quality: access
    form: remote
    extent: 1 online resource (viii, 302 pages)
  abstract: High-Level Synthesis for Real-Time Digital Signal Processing is a comprehensive reference work for researchers and practicing ASIC design engineers. It focuses on methods for compiling complex, low to medium throughput DSP system, and on the implementation of these methods in the CATHEDRAL-II compiler. The emergence of independent silicon foundries, the reduced price of silicon real estate and the shortened processing turn-around time bring silicon technology within reach of system houses. Even for low volumes, digital systems on application-specific integrated circuits (ASICs) are becoming an economically meaningful alternative for traditional boards with analogue and digital commodity chips. ASICs cover the application region where inefficiencies inherent to general-purpose components cannot be tolerated. However, full-custom handcrafted ASIC design is often not affordable in this competitive market. Long design times, a high development cost for a low production volume, the lack of silicon designers and the lack of suited design facilities are inherent difficulties to manual full-custom chip design. To overcome these drawbacks, complex systems have to be integrated in ASICs much faster and without losing too much efficiency in silicon area and operation speed compared to handcrafted chips. The gap between system design and silicon design can only be bridged by new design (CAD). The idea of a silicon compiler, translating a behavioural system specification directly into silicon, was born from the awareness that the ability to fabricate chips is indeed outrunning the ability to design them. At this moment, CAD is one order of magnitude behind schedule. Conceptual CAD is the keyword to mastering the design complexity in ASIC design and the topic of this book.
  note: by Jan Vanhoof, Karl Rompaey, Ivo Bolsens, Gert Goossens, Hugo Man.
  note: Electronic resource.
  subject:
    topic: Engineering
  subject:
    topic: Computer-aided design
  subject:
    topic: Computer engineering
  subject:
    topic: Systems engineering
  subject:
    topic: Computer-aided design
  subject:
    topic: Computer engineering
  subject:
    topic: Engineering
  subject:
    topic: Systems engineering
  classification: TK7888.4
  classification: 621.3815
  related item:
    title info:
      title: Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing ; 216
  identifier: 9781475722222 (electronic bk.)
  identifier: 1475722222 (electronic bk.)
  identifier: 9781441951342
  identifier: 1441951342
  identifier: http://proxy.library.tamu.edu/login
  record info:
    record content source: AU@
    record creation date: 121205
    record change date: 20260420215554.4
    record identifier: in00003558134
    language of cataloging:
      language term: eng