Formal Equivalence Checking and Design Debugging /

Formal Equivalence Checking and Design Debugging covers two major topics in design verification: logic equivalence checking and design debugging. The first part of the book reviews the design problems that require logic equivalence checking and describes the underlying technologies that are used to...

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Bibliographic Details
Main Author: Huang, Shiyu
Corporate Author: SpringerLink (Online service)
Other Authors: Cheng, Kwang-Ting (Tim)
Format: eBook
Language:English
Published: Boston, MA : Springer US, 1998.
Series:Frontiers in electronic testing ; 12.
Subjects:
Online Access:Connect to the full text of this electronic book
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by Huang, Shi-Yu, 1965-
Published 1998
Book