rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: VLSI chip design with the hardware description language VERILOG
    sub title: an introduction based on a large RISC processor design
  title info:
    title: VLSI chip design
  name:
    name part: Golze, Ulrich
    name part: 1948-
    role:
      role term: creator
  name:
    name part: SpringerLink (Online service)
  type of resource: text
  genre: bibliography
  genre: Electronic books.
  origin info:
    place:
      place term: gw
    date issued: 1996
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: remote
    extent: 1 online resource (xiv, 358 pages) : illustrations.
    extent: 1 online resource (1 computer disk (3 1/2 in.)
  abstract: This book introduces to modern design of large chips. A powerful RISC processor in the range of a SPARC is apecified in a hardware description language (HDL), it is developed hierarchically and is finally sent as a gate model to the silicon vendor LSI Logic for production. The resulting processor on a semi-custom gate-array chip with more than 50.000 used gates and an efficiency of up to 40 MIPS is tested on an automatic test equipment and a testboard. The book also introduces thoroughly to the HDL VERILOG. The included disk contains more than 40 small and medium sized executable VERILOG examples, the large processor models and the VERILOG simulator VeriWell running on PC or SPARC.
  table of contents: Accompanied by floppy disk available from the Issue Desk.
  note: Ulrich Golze ; with Peter Blinzer ... [and others].
  note: Includes bibliographical references (pages [347]-351) and index.
  subject:
    topic: Integrated circuits
    topic: Very large scale integration
    topic: Computer-aided design
  subject:
    topic: Verilog (Computer hardware description language)
  subject:
    topic: RISC microprocessors
    topic: Computer-aided design
  subject:
    topic: Entwurf
  subject:
    topic: Prozessor
  subject:
    topic: RISC
  subject:
    topic: VERILOG
  subject:
    topic: VLSI
  subject:
    topic: Integrated circuits
    topic: Very large scale integration
    topic: Computer-aided design
  subject:
    topic: RISC microprocessors
    topic: Computer-aided design
  subject:
    topic: Verilog (Computer hardware description language)
  classification: TK7874.75 .G65 1996eb
  classification: 621.39/5
  classification: DAT 190f
  classification: ST 190
  classification: ZN 4950
  classification: ZN 4952
  related item:
    title info:
      title: VLSI chip design with the hardware description language VERILOG
    name:
      name part: Golze, Ulrich, 1948-
    identifier: (DLC) 95051357
    identifier: (OCoLC)33947079
  identifier: 9783642610011 (electronic bk.)
  identifier: 3642610013 (electronic bk.)
  identifier: 3540600329
  identifier: 9783540600329
  identifier: http://proxy.library.tamu.edu/login
  record info:
    record content source: GW5XE
    record creation date: 140711
    record change date: 20260423141548.2
    record identifier: in00003551975
    language of cataloging:
      language term: eng