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Test resource partitioning for system-on-a-chip /

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Test Resource Partitioning for System-on-a-Chip is about test resource partitioning and optimization techniques for plug-and-play system-on-a-chip (SOC) test automation. Plug-and-play refers to the paradigm in which core-to-core interfaces as well as core-to-SOC logic interfaces are standardized, su...

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Bibliographic Details
Main Author: Chakrabarty, Krishnendu
Corporate Author: SpringerLink (Online service)
Other Authors: Iyengar, Vikram, Chandra, Anshuman
Format: eBook
Language:English
Published: New York : Springer, [2002]
Series:Frontiers in electronic testing ; 20.
Subjects:
Systems on a chip > Testing.
Plug and play (Computer architecture)
Electronic books.
Online Access:Connect to the full text of this electronic book

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