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|a 9781447107637 (electronic bk.)
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|a 1447107632 (electronic bk.)
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|a Calinescu, R. C.
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| 245 |
1 |
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|a Architecture-Independence Loop Parallelisation /
|c by R.C. Calinescu.
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| 264 |
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1 |
|a London :
|b Springer London,
|c 2000.
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| 300 |
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|a 1 online resource (XVIII, 172 pages)
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|a Distinguised Dissertations
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|a Introduction -- The bulk-synchronous parallel model -- Data dependence analysis and code transformation -- Communication overheads in loop nest scheduling -- Template-matching parallelisation -- Generic loop nest parallelisation -- A strategy and a tool for architecture-independent loop parallelisation -- The effectiveness of architecture-independent loop parallelisation -- Conclusions -- A: Theorem proofs -- B: Syntax of the bspscheduler input language -- C: Syntax of the bspscheduler output language -- D: Automatically generated code for example 7.5 -- Bibliography -- Index. The complete table of contents can be found on the Internet: http://www.springer.de.
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| 520 |
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|a Architecture-independent programming and automatic parallelisation have long been regarded as two different means of alleviating the prohibitive costs of parallel software development. Building on recent advances in both areas, Architecture-Independent Loop Parallelisation proposes a unified approach to the parallelisation of scientific computing code. This novel approach is based on the bulk-synchronous parallel model of computation, and succeeds in automatically generating parallel code that is architecture-independent, scalable, and of analytically predictable performance.
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2 |
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|a SpringerLink (Online service)
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|a Distinguised Dissertations.
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|u http://proxy.library.tamu.edu/login?url=https://link.springer.com/10.1007/978-1-4471-0763-7
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| 952 |
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|a Texas A&M University
|b College Station
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|e TK7895.M5
|h Library of Congress classification
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| 998 |
f |
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|l Available Online
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