Fast simulation of computer architectures /

Chapters in Fast Simulation of Computer Architectures cover topics such as how to collect traces, emulate instruction sets, simulate microprocessors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to simulation, and how to augment simulation with performanc...

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Bibliographic Details
Corporate Author: SpringerLink (Online service)
Other Authors: Conte, Thomas M., 1964-, Gimarc, Charles E., 1953-
Format: eBook
Language:English
Published: New York : Springer, [1995]
Subjects:
Online Access:Connect to the full text of this electronic book
Description
Summary:Chapters in Fast Simulation of Computer Architectures cover topics such as how to collect traces, emulate instruction sets, simulate microprocessors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to simulation, and how to augment simulation with performance bound models. The chapters have been written by many of the leading researchers in the area, in a collaboration that ensures that the material is both coherent and cohesive. Audience: Of tremendous interest to practising computer architect designers seeking timely solutions to tough evaluation problems, and to advanced upper division undergraduate and graduate students of the field. Useful study aids are provided by the problems at the end of Chapters 2 through 8.
Item Description:Includes index.
Electronic resource.
Physical Description:1 online resource (256 pages)
ISBN:9781461523611 (electronic bk.)
1461523613 (electronic bk.)